Predictable and Parallel Execution of Real-Time Applications on Cache-Coherent Multicores

We present an approach for designing and deploying real-time applications onto shared-bus multicore platforms with cache coherency. We model an application as a directed acyclic graph, and partition it into scheduling intervals. These are then mapped onto multiple cores and scheduled for parallel execution with the objective to reduce the worst-case response time of the application. To accomplish this, we schedule the intervals’ execution and their memory accesses to minimize the temporal interferences resulting from exchanging instructions and data on the shared bus. In particular, our approach incorporates the effect of cache coherency traffic on the worst-case response time of the application. We implement an algorithm that performs the analysis, scheduling, and mapping, and we present a parallelized JPEG case study that demonstrates the efficacy of our approach. Our results show that the proposed approach greatly improves the scalability of real-time applications scheduled onto multicore platforms.